Principal Engineer, Digital Design

Job description

Job Summary: We are seeking a Principal Digital Design Engineer based in Allen, TX, to own the IO subsystem for onsemi’s microcontroller platform. In this role, you will be responsible for defining, architecting, and delivering a highly configurable IO subsystem that supports a wide range of product requirements across multiple end markets. This position plays a critical role in enabling platform scalability and product differentiation. The IO subsystem must be flexible, reusable, and optimized for performance, power, and area while supporting a wide range of product requirements. The Principal Engineer will serve as the technical leader for the IO subsystem, driving architecture, RTL implementation, and design automation strategy, while partnering closely with system architecture, product lines, DFT, physical design, verification, and software teams. This role requires strong technical execution, cross-functional leadership, and the ability to influence platform direction. Responsibilities: Responsibilities Own the architecture and development of the IO subsystem, ensuring configurability and reuse across multiple productsDefine subsystem-level specifications, interfaces, and integration strategy aligned with platform and product requirementsDefine and implement parameterized and Python generator-based design approaches, enabling scalable and configurable subsystem instantiationDrive the creation of automatically generated testbenches and verification environments, leveraging UVM frameworks and AI-assisted techniques Develop high-quality SystemVerilog RTL, ensuring compatibility with automated generation flows and maintainability at scaleSupport synthesis, STA, and timing closure activities to ensure signoff-ready designsCollaborate with verification, DFT, and physical design teams to achieve first-time right siliconApply AI/ML techniques to improve design productivity, including code generation assistance, verification acceleration, and design space exploration Drive PPA optimization while maintaining configurability and reuse targetsEstablish best practices for design automation, code generation, and methodology standardization across the organization Qualifications: Required Bachelor’s degree in Electrical Engineering or related field (Master’s preferred)10+ years of experience in digital IC design with strong RTL development backgroundExpert-level proficiency in SystemVerilog RTL designStrong experience with Python for design automation and tool developmentSolid experience with UVM-based verification methodologies and testbench developmentStrong understanding of UPF, synthesis, STA, and timing signoff flowsExperience working with DFT concepts and integrationStrong cross-functional collaboration skills across design, verification, physical design, and product teamsPreferred Experience designing IO subsystems or peripheral architectures for microcontrollers or SoCsExperience with design generators, templated RTL, or hardware construction frameworksExposure to AI/ML techniques applied to hardware design or verification workflowsExperience building or deploying automated testbench generation and regression systemsFamiliarity with highly configurable or parameterized architecturesExperience in automotive or safety-critical designs