Senior Design Verification CAD Engineer, Silicon, Google Cloud

Job description

Lead CAD methodology engineers to provide support for chip Design Verification (DV) teams, and manage and mitigate support issues for tool flows. Partner with chip project teams to influence and standardize methodology across functional areas and geography. Perform or guide technical evaluations of tools for possible deployment. Collaborate with teams across Google to identify and create opportunities for improved chip design across Google. Participate in design reviews and track issue resolution and engage in technical and schedule trade-off discussions. Minimum Qualifications: Bachelor's degree in Electrical Engineering, Computer Science Engineering, or equivalent practical experience. 5 years of experience working with Computer-aided design (CAD). Experience with SystemVerilog, Hardware Design, Automation, Design Verification Test. Preferred Qualifications: Master's degree or PhD in Electrical Engineering, Computer Engineering or Computer Science or a related field. Experience planning and deploying new tools and flows to users. Knowledge of the chip design process for design and verification. Ability to present and explain novel methods to users.