Senior RTL Design Engineer, TPU Compute

Job description

Create and own microarchitecture for Compute accelerator IPs. Develop implement, and maintain design blocks or components. Develop SystemVerilog RTL to implement logic for ASIC products according to established coding and quality guidelines. Work with design verification and validation teams to create testplans to verify, and debug design RTL. Work with physical design teams to ensure design meets physical requirements and timing closure.