RTL Design Engineer, Machine Learning Accelerators

Job description

Understand the overall application of the chip, proposing and developing improvements in overall design. Design and document one or more blocks of an ASIC, including functionality and timing. Work with software teams on functionality, interfaces, and documentation. Minimum Qualifications: Bachelor's degree in electrical engineering, computer engineering, computer science, or a related field, or equivalent practical experience. 4 years of experience with custom silicon design (e.g., SoCs, ASICs, etc.). Experience with RTL design using Verilog or SystemVerilog. Preferred Qualifications: Master's degree or PhD in electrical engineering, computer engineering, or computer science, with a focus on computer architecture. Experience interacting with software, architecture, and other cross-functional teams. Experience with a scripting language (e.g., Python or Perl). Experience applying engineering best practices (e.g., code review, testing, refactoring). Knowledge of processor design, accelerators, or memory hierarchies and machine learning algorithms. Knowledge of high performance and low power design techniques.